The invention relates to a semiconductor device that includes both silicon-on-insulator (SOI) and non-SOI devices.
Silicon-on-insulator (SOI) technology relates, for example, to high speed MOS and CMOS circuits or chips. According to SOI technology, a layer of insulative material (e.g., silicon oxide) is formed under a thin semiconductor layer (e.g., Si) to reduce the capacitive coupling between the semiconductor layer and the underlying substrate material. The insulator may be formed by implanting oxygen into the workpiece and annealing the workpiece.
In certain circumstances, it is desirable to provide both SOI and non-SOI devices on one chip. However, silicon-on-insulator structures and devices may not be compatible with non-silicon-on-insulator structures and devices. For example, SOI devices, while they may be optimal in some cases, are not readily implementable in trench DRAM technology.
In an SOI substrate, a buried layer of oxide is formed in a silicon substrate. Typically, another layer of substrate underlies the oxide portion. In a typical silicon substrate, the oxide layer may be represented by the formula SiOx. In this formula, x is a number from 1 to 3.
A patterned silicon-on-insulator structure may be formed by forming the buried layer of oxide in a certain region of the silicon substrate. During the patterned SOI formation, high doses of oxygen are implanted. These implants can cause undesirable defects and oxide precipitations in the non-SOI regions of the patterned SOI substrate (wafer).
When the layer of oxide is formed in the substrate to create a silicon-on-insulator region, there is typically a volume expansion when oxidizing the substrate to form the oxide layer. In one case, the volume expansion is about 2.1x. As a result of this volume expansion, large stresses may be built up in the substrate. Thus, trying to pattern the SiOx layer in the wafer may cause a high level of dislocation to be formed. The dislocation can result in non-manufacturable processes unless they can be filtered out.
The present invention provides a solution to the above-discussed problems, among others, by providing a method for fabricating both SOI and non-SOI devices on a single semiconductor substrate and a semiconductor device structure that includes both SOI and non-SOI devices on a single semiconductor substrate.
In accordance with these and other objects and advantages, the present invention provides a semiconductor device structure. The structure includes a substrate including at least one silicon-on-insulator (SOI) region and at least one non-silicon-on insulator region. The at least one silicon-on-insulator region and the least one non-silicon-on-insulator region are formed in a pattern in the substrate. A deep trench is arranged continuously in the substrate around sides of the at least one SO region, so as to separate the at least one SOI region from the at least one non-SOI region. The deep trench has a substantially constant depth dimension and a substantially constant width dimension.
The present invention also provides a method for forming a semiconductor device structure. The inventive method includes providing a substrate, forming a deep trench continuously in the substrate to separate a first region from a second region, and then forming a SOI region in the first region while maintaining a non-SOI region in the second region.
Because the deep trench is formed before an oxygen implant step used to help form the SOI region, oxygen from the first region (e.g., SIMOX region) cannot reach the second region (e.g., bulk region) during the step of forming the SOI region. More particularly, during the step of annealing the SIMOX-region, defect formed because of the buried oxide formation will be filtered out of (prevented from) the non-SOI region by the deep trench.
Still other objects and advantages of the present invention will become more readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawing figures and description are to be regarded as illustrative in nature and not as restrictive.